A VHDL Model for Implementation of MD5 Hash Algorithm | ||
| Engineering and Technology Journal | ||
| Article 1, Volume 31, A 6, June 2013, Pages 1107-1116 PDF (722.96 K) | ||
| DOI: 10.30684/etj.31.6A7 | ||
| Author | ||
| Mohammed A. Noaman | ||
| Abstract | ||
| With the increase of the amount of data and users in the information systems, the requirement of data integrity is needed to be improved as well, so the work has become necessary independently. One important element in the information system is a key of authentication schemes, which is used as a message authentication code (MAC). One technique to produce a MAC is based on using a hash function and is referred to as a HMAC.MD5 represents one efficient algorithms for hashing the data, then, the purpose of implementation and used this algorithm is to give them some privacy in the application. Where they become independent work accessories as much as possible, but what is necessary, such as RAM and the pulse generator. Therefore, we focus on the application of VHDL for implement and computing to MD5 for data integrity checking method and to ensure that the data of an information system is in a correct state. The implementation of MD5 algorithm by using Xilinx-spartan-3A XCS1400AFPGA, with 50 MHz internal clock is helping for satisfies the above requirements. | ||
| Keywords | ||
| FPGA; MAC; Hash function and password | ||
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