yousif, R., Hashim, I., Abd, B. (2023). Implementation of Hyperbolic Sine and Cosine Functions Based on FPGA using different Approaches. Alustath, 41(8), 1091-1106. doi: 10.30684/etj.2023.139756.1440
Rawasee k. yousif; Ivan A. Hashim; Bassam H. Abd. "Implementation of Hyperbolic Sine and Cosine Functions Based on FPGA using different Approaches". Alustath, 41, 8, 2023, 1091-1106. doi: 10.30684/etj.2023.139756.1440
yousif, R., Hashim, I., Abd, B. (2023). 'Implementation of Hyperbolic Sine and Cosine Functions Based on FPGA using different Approaches', Alustath, 41(8), pp. 1091-1106. doi: 10.30684/etj.2023.139756.1440
yousif, R., Hashim, I., Abd, B. Implementation of Hyperbolic Sine and Cosine Functions Based on FPGA using different Approaches. Alustath, 2023; 41(8): 1091-1106. doi: 10.30684/etj.2023.139756.1440

Implementation of Hyperbolic Sine and Cosine Functions Based on FPGA using different Approaches

Engineering and Technology Journal
Volume 41, Issue 8, August 2023, Pages 1091-1106    PDF (1.06 M)
Document Type: Research Paper
DOI: 10.30684/etj.2023.139756.1440
Authors
Rawasee k. yousif* ; Ivan A. Hashim; Bassam H. Abd
Electrical Engineering Dept., University of Technology-Iraq, Alsina’a street, 10066 Baghdad, Iraq.
Abstract
This paper presents the implementations of the hyperbolic sine and cosine functions, which are essential in many digital systems. In the previous eras, these functions were only implemented in software; however, hardware implementations have recently become more significant due to the performance advantages of hardware systems over software implementations. Therefore, these functions can be hardware implemented using various methods such as the CORDIC algorithm, Taylor series, polynomial approximation technique, and LUT approach. This paper focuses on reducing area utilization (logic components), low latency, and reducing power consumption. Five designs are proposed based on different techniques, in which the ROM approach achieved the best results compared to the other four proposed designs. It also achieved low area utilization, high speed and low power consumption compared to the related works where the ROM approach consumes the resource utilization are as follows: zero flip-flops, (26) occupied slices, and (43) look-up tables. The total power consumed is about (56 mW), and there is a high execution speed of one clock cycle.

Highlights
  • Modifying the range of hyperbolic sine and cosine functions from the range (-π/4 to+π/4) to the range (-π to+π).
  • Use three ROMs positive integers, positive values,and negative values, to design the exponential.
  • System stores half wave of hyperbolic sine and cosine functions in memory, instead of storing full wave.
Keywords
FPGA; hyperbolic sine; hyperbolic cosine; area minimization; low latency
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