Effect of Thickness and annealing Temperature on (C-V) Characterization of CdS/Si Heterojunction Preparing by DC Planar Magnetron Sputtering Technique and study of D.C. Electrical Conductivity. | ||
| Journal of University of Babylon | ||
| Article 1, Volume 22, Issue 2, March 2014, Pages 847-856 | ||
| Authors | ||
| Nahida B. Hasan; Ahmed S. Hussian; Kadhim A. Aadim | ||
| Abstract | ||
| The thin films of CdS deposited on silicon wafers substrate by ) dc planar magnetron sputtering techniques) . and they are study photovoltaic characteristics of (n-CdS/p-Si) Heterojunction, then we found type of heterojunction is abrupt type , also we calculated built-in potential (Vbi) at (400 kHz) and for thickness (100,200 and 300) nm for different temperatures (303,373 and 473) K and study the variation junction capacitance with bias voltage, variation voltage with reciprocal of square capacitance , and the width of depletion layer can be calculated and study of the variation of electrical conductivity as a function of temperature for different thicknesses , it is clear from this study that the conductivity for all deposited films increases with thickness, and increases with temperature . Also its observed that the conductivity of the films decreases with increasing of annealing temperatures and we found there are tow activation energy can be calculated in this study. | ||
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