Implementation of MAC Units on FPGAs for DSP Architecture | ||
Al-Rafidain Engineering Journal (AREJ) | ||
Article 9, Volume 16, Issue 1, February 2008, Pages 48-58 PDF (0 K) | ||
DOI: 10.33899/rengj.2008.44002 | ||
Author | ||
Shavan K. Asker | ||
Abstract | ||
This paper is an attempt to design and implement MAC (multiply-accumulate) units for pipeline DSP architectures on FPGAs. An application has been chosen to evaluate the results of the architecture. Results show that these units are applicable and can be used by the developers especially by the lifting based discrete wavelet transform. Keywords: MAC unit, FPGAs, Architecture. | ||
Keywords | ||
KEYWORDS; FPGAs; architecture | ||
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