Architecture Design of 2-D Discrete Wavelet Transformation Algorithm using Field Programmable Gate Array (FPGA) | ||
AL-Rafidain Journal of Computer Sciences and Mathematics | ||
Article 16, Volume 11, Issue 1, June 2014, Pages 109-123 PDF (993.68 K) | ||
Document Type: Research Paper | ||
DOI: 10.33899/csmj.2014.163742 | ||
Authors | ||
Maha A. Hasso; Sahla A. Ali | ||
College of Computer Science and Mathematics University of Mosul, Mosul, Iraq | ||
Abstract | ||
In this paper an architecture has been proposed for the 2-D Discrete Wavelet Transform (DWT) and the Inverse Discrete Wavelet Transform (IDWT) based on the Convolution method of the Daubechies 5/3-tap Biorthogonal filter bank in the Algorithm transformto image processing, and implementation it on the FPGA (Field Programmable Gate Array) using VHDL, for benefiting from implementation advantages of these Hardware and save run-time. The processing results proved speed and Efficiency of the proposed architecture, where the employed number of slices is less. So it result to Frequency higher and less run-time.The type of the FPGA based in this paper is Xilinx XC3S500E Spartan-3E using Xilinx ISE 9.2i. | ||
Keywords | ||
2-D Discrete Wavelet Transformation; Field Programmable Gate Array(FPGA) | ||
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