Design and Implementation of Convolutional Encoder and Viterbi Decoder Using FPGA. | ||
| Journal of University of Babylon | ||
| Article 1, Volume 26, Issue 3, September 2018, Pages 22-29 | ||
| Authors | ||
| Riham Ali Zbaid; Kasim K. Abdalla | ||
| Abstract | ||
| Keeping the fineness of data is the most significant thing in communication.There are many factors that affect the accuracy of the data when it is transmitted over the communication channel such as noise etc. to overcome these effects are encoding channels encryption.In this paper is used for one type of channel coding is convolutional codes. Convolution encoding is a Forward Error Correction (FEC) method used in incessant one-way and real time communication links .It can offer a great development in the error bit rates so that small, low energy, and devices cheap transmission when used in applications such as satellites. In this paper highlight the design, simulation and implementation of convolution encoder and Viterbi decoder by using MATLAB- program (2011). SIMULINK HDL coder is used to convert MATLAB-SIMULINK models to VHDL using plates Altera Cyclone II code DE2-70. Simulation and evaluation of the implementation of the results coincided with the results of the design show the coinciding with the designed results. | ||
| Keywords | ||
| Convolutional encoder; Viterbi decoder; Matlab; program; FPGA | ||
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